

In fact, this process starts after any instruction being performed upon this register.

Set by hardware if 9th bit received is a logic 1. Cleared by hardware if 9th bit received is a logic 0. RB8 – Receiver bit 8 or the 9th bit received in modes 2 and 3.It is set to transmit a logic 1 in the 9th bit. Since all registers are 8-bit wide, this bit solves the problem of transmitting the 9th bit in modes 2 and 3. When cleared, serial reception is disabled. REN – Reception Enable bit enables serial reception when set.When set, it enables multiprocessor communication in mode 2 and 3, and eventually mode 1. SM2 – This bit is used for serial port mode selection, also known as multiprocessor communication enable bit.

SM1 – This bit is used for serial port mode selection.SM0 – This bit is used for serial port mode selection.
